The conventional means for achieving higher CMOS image sensor resolution is to use a planar scaling process that reduces feature sizes and allows more pixels to be squeezed into a given area. A major obstacle to this manufacturing approach is maintaining sufficiently high levels of dynamic range. This refers to the ability to capture very low light and bright light at the same time, which becomes more difficult because smaller pixels are prone to saturation that can introduce image artifacts.

To enable continued 2D pixel scaling through the next several process nodes, smartphone camera designers will require innovations in materials engineering that enable new isolation and passivation techniques. For example, as more pixels share the same die area they are increasingly subject to crosstalk that can lead to pixel noise and poor image quality. Deep isolation trenches between pixels are required to separate individual signals; however, as planar pixel scaling progresses, these isolation trenches become taller and thinner, creating extremely high aspect ratios. Today these ratios are in the range of 40:1 but could soon reach 60:1 and even 100:1.

In the upcoming ICAPS Master Class, Applied will describe innovative solutions to increase isolation trench aspect ratios, improve signal-to-noise ratio and enable continued pixel scaling.

Silicon Carbide: Innovation Needed to Enable Transition to Larger Wafers

As my colleague Llew Vaughan-Edmunds recently wrote, the electrification of vehicles is disrupting the global transportation industry. It’s also dramatically altering the quantity and variety of chips used in cars. Today’s electric vehicles (EVs) already require nearly twice the semiconductor content by dollar value as compared to internal combustion engine vehicles. By 2030, we could see another doubling based on the need for chips used to support varying levels of Advanced Driver Assistance Systems (ADAS).

On the device side, silicon carbide (SiC) MOSFETs are expected to play an increasingly prominent role in everything from EV power distributors and regulators to the high-voltage traction inverter modules that power EV motors. Thanks to their fast switching speed—and high voltage and current handling capability—SiC MOSFETS enable smaller and lighter motor drive systems to be used, and this helps further increase EV range.

To meet the burgeoning demand for SiC power devices, chipmakers would like to accelerate the transition from 150mm wafers to 200mm, nearly doubling die output per wafer. Two materials engineering challenges are SiC wafer surface quality and electron mobility. Compared to silicon, SiC is inherently tougher, and natural defects can cause disruptions in the lattice structure of the device material which degrades electrical performance, power efficiency, reliability and yield. SiC wafers act as a base upon which additional SiC layers will be grown using epitaxy. Surface quality is critically important because any defects on the surface of the wafer will propagate through the upper layers, affecting the devices (see Figure 2). Creating a near-perfect surface on such a hard material is a key challenge, but Applied is developing advanced materials engineering solutions to optimize raw SiC wafers for production.

In addition, turning the SiC material into functioning power devices also requires injecting ions that enable current to flow as designers intend. Here too, the hardness of SiC material and the need for lattice integrity pose challenges to the approaches used in silicon wafers: ion implantation and diffusion. New solutions will be detailed at the Master Class.

As these two use cases illustrate, the ICAPS markets are all about new innovations in materials engineering. With decades of experience at all nodes and wafer sizes, Applied is in a unique position to help ICAPS customers accelerate innovation in their markets. Applied plans to enable its customers by combining unit process leadership with co-optimized and integrated solutions.

Tags: ICAPS, PPACt, iot, communications, automotive, power, sensors, silicon carbide, CIS